Onkyo TXNA 906 Service Manual

Page 1

TX-NR906/NA9 6

Ref. No. 4095
082008

ON KYO SERVICE MANUAL

AV RECEIVER

MODEL TX-NR906
MODEL TX-NA906

RC-687M

TX-NR906 Black, Golden and Silver models

B MDC, S MDD, G MDT 120V AC, 60Hz
B MMP, S MMP 220-240V AC, 50Hz
S MMT, G MMT 220-240V AC, 50/60Hz

TX-NA906 Black, Golden models
l B MMR, G MMR | 220-240v AC, 50/60Hz

SAFETY-RELATED COMPONENT
WARNING! !

COMPONENTS IDENTIFIED BY MARK A ON THE
SCHEMATIC DIAGRAM AND IN THE PARTS LIST ARE
CRITICAL FOR RISK OF FIRE AND ELECTRIC SHOCK.
REPLACE THESE COMPONENTS WITH ONKYO
PARTS WHOSE PART NUMBERS APPEAR AS SHOWN
IN THIS MANUAL.

MAKE LEAKAGE-CURRENT OR RESISTANCE
MEASUREMENTS TO DETERMINE THAT EXPOSED
PARTS ARE ACCEPTABLY INSULATED FROM THE
SUPPLY CIRCUIT BEFORE RETURNING THE
APPLIANCE TO THE CUSTOMER.

ONKYO.

IMAGINATIVE SIGHT & SOUND

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IC BLOCK DIAGRAMS ANDTERIVINAL DESCRIPTIONS -48
Q8m1: ADV7320 (Video Encoder with Six 12-bit DACS)

TERMINAL DESCRIP'HON

Pin No. Mnemonic Input/Output Destrlptlon

11,57 DGND G Digital Ground,

40 AGND G Analog Ground.

32 CLKIN_A | Pixel Clock Input for HD Only I74.25 MHZ), PS Only (27 MHZ), and SD Only I27 MHZ).

63 CLKIN 78 1 Pixel Clock Input. Requires a 27 MHz reference clock for PS mode oi a 74.25 MHzI74.1758 MHz)
relerenre clock in HDTV mode. This (Iork is only used In dual modes.

45, 36 COMPI, 0 Compensation Pin for DACs. Connect 0,1 pF capacitorfrom COMP pin to VM.

COMP]

44 DAC A O CVBS/Gieen/V/Y Analog Output.

43 DAC E O Chloma/BIue/U/Pb Analog Output.

42 DAC C O Luma/Red/V/Pl Analog Output.

39 DAC D O in SD Only Mode: CVBS/Green/Y Analog Output; In HD Only Mode and Simultaneous HD/SD
Mode: V/Green [HD] Analog Output.

38 DAC E O In SD Only Mode: Luma/BIue/U Analog Output; in HD Only Mode and Simultaneous HD/SD
Mode: Pr/Red Analog Output.

37 DAC F O In SD Only Mode: Chroma/RedN Analog Output; in HD Only Mode and Simultaneous HD/SD
Mode: Ply/Blue [HD] Analog Output.

23 {HTNC | Video Horizontal Sync Control Signal [or HD in Slniultarleous SD/HD Mode and HD Only Model

24 m | Video Vertical Sync Control Signal to: HD in Simultaneous SD/HD Mode and HD Only Mode,

25 W | Video Blanking Control Signal {or HD in Simultaneous SD/HD Mode and HD Only Mode.

48 m 1/0 Video Blanking Control Signal for so Only.

49 SAVSYNC i/O Video Vertical Sync Control Signal for 5D Only.

50 m 1/0 Video Horizontal Sync Control Signal for SD Only.

I3, 12, V9 to V0 l SD or PS/HDTV Input Port for Y Data, Input port for Interleaved progressive scan data.The [SB

9 to 2 Is set up on Pin V0. For 8-bit data input, LSB is set up on Pin Y2.

30 to 26, C9 to CD I PS/HDTV Input Port 4:414 Input Mode This part Is used ID! the CbiBIue/U] dara.Tiie [SB is set

18 to 14 up on Pin (0. For Shit data input. LSB Is set up (in Pin C2.

Pin No. Mnemonk Input/Output Description

62 to 58, S9 to 50 I SD or PS/HDTV Input Partial ClIRedNI Data In 4:414 Input Mode. LSB is set up on Pin 50. For

55 to SI 8-bit data input, LSB is set up on Pin 52.

33 W I This Input resets the onechlp timing generator and sets the ADV7320/ADV7321 into default
register setting. RESFI is an active low signalu

47, 35 Kim, RI-rr. l A 3040 Q resistor must be connected from this pin to AGND and Is used to control the
amplitudes of the DAC outputs.

22 SCLK I It Port Serial Interface Clock Input.

ZI SDA l/O l7C Port Serial Data Input/Output.

20 ALSB I TTL Address Input. This signal sets up the LES ofthe PC address. When this pin Is tied low, the
I( filter Is activated, which reduces noise on the It Interface.

1 Von Iii P Power Supply for Digital Inputs and outputs,

to, 56 Vnn P DIgItal Power Supply.

41 V P Analog Power Supply.

46 Vksr i/O Optional External Voltage Reference Input Ior DACs or Voltage Reference Output (1.235 V).

34 EXTVLF I External Loop Filter for the Internal PLL

31 RTC SCR TR l Multifunctional Input. Real-time control (RTC) Inpul, timing reset input, subcarrier reset input.

19 I( I this Input pin must be tied high (Vm .nI for the ADV7320/ADV7321 to interface overthe 1": port.

64 GND_IO Digital Input/Output Ground.