Onkyo TX 25 Service Manual

Page 13

5r PLL tuned circuit

, 38_ Psc H
FMl ' ' 1 , r
a" i 0 Pr 5: let 37 s u
Oscillator r 4 9 3 i , , - wa ow
mew l was art/32 countev l
t ,7 , W,
l r 777, r v , ,, ,
r i AM local t
; oscillator ,, 39+ FM/AM ,ongrammable' tr

l mm to selector divider
K , _ , _

Low pass _ E5

-777777- ,
ftlrer

l controller LSl

Phase - tr
omuaralor

7 Wm
crystal
USEl llator

,
Reference
# irequencv
_ away

("9- 5i

'm 5

Mom l

OUT 2

J

(fig 7) TD6104P (Prescaler)

A block diagram of the tuned circuit of the PLL is shown in
figer 6r

Operation during AM reception

The reception frequency is applied to the programmable
divider where it is divided to UN and output as fv. This is
applied to the phase comparator where it is comparated
with frequency reference fr (9kHz for G/W model and
IOkHz for D model; if fr and fv differ, E0 equal to the dif»
ference in frequency is output. Since error output E0 is a
pulse waveform, it is passed through the low pass filter to
change it into DC voltage Vn, which is applied to the varia-
ble capacitor diode in the front end to change the reception
frequency, This continues until fv and fr are the same and
150:0,

Operation during FM reception

The pulse swallow method is used in the prescaler of
this unit. In this type ofprescaler, a supplementary number

6, Frequency indicator circuit

an :2 an 12 92 :3 b3 e3 d3 9) t! 53

LAVCN x

'

AuoER

l
A

(changed according to the program code input) and the
divided reception frequency from the prescaler are com-
bined in the control counter and the prescalers division
factor is switched 1/30 or 11/32 according to external
control (1/32 when the PSC terminal is H" and 1/30 when
it is L").

The station oscillator frequency is applied ot the program
mable divider, but the programmable divider has en upper
frequency limit of only 30MHZ. so the pulse swallow-type
prescaler, which can be used up to 150 MHZ, is inserted for
division to l/Np;

The signal is applied to the programmable divider and
divided to UN. The result is compared with a 25kHz
frequency reference in the phase detector and the error
is output as E0 until a match is obtained as in AM opera-
tion.

FM I D D l:/ MHz
AM l/EI/:21=./T/ L: KHz

Bmuy to BCD and lF OFFSEV ROM

(fig. 8) TD6301AP block diagram