Akai PS 120 M Service Manual

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Akai PS 120 M Service Manual

Extracted text from Akai PS 120 M Service Manual (Ocr-read)

Page 2




SECTION 1 SERVICE MANUAL .................... 3
SECTION 2 PARTS LIST ......... .. 57


Page 10

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3) Pt: Driver Circuit (Refer to Fig. 12)

The negative phase signals from the first stage
differential amplifier (refer to PS-ZOOC circuit
explanation) enter the bases of TRS and TR7 and the
negative phase outputs from each collector become
base inputs to the transistors of the next stage.

Although the signal from the TR7 collector becomes
the base inth of TRIO. the signal from the TR6
coUector must become TRII base input to have the
pMII-pllu circuitry. Voltage between two sides of
R17 (1.8 k) is supplied to TRIO hase bias. TRS is
biased by voltage between two sides of R16 (1.8 k)
+ DI and is supplied with 1C8. And since V5}; of TRS


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Fig. 12 Pre Driver Circuit

is approximately the same voltage as the D1 voltage
drop, R21 (I ,8 k) is supplied with the same voltage
as the voltage between two sides of R16 = R17
(I .8 k).

This ICE passes the cascade connected TR9 and flows
to R25 (1.8 k).

Since R21 and R25 resistor Values are equal, TRII
base is supplied with an equal potential bias as the
TRIO base, As explained above, TR7 collector signal
enters the TRIO base, TRS collector signal appears in
the voltage between two sides of R25 as a change in
ICE and enters TR] 1 base after which it is passed to
the next stage by the push-pull circuitry


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4) Over Current Protection Circuit (Refer to Fig. 13)
When the speaker terminal of the power amplifier is
shortcircuited or when the load impedance equiva-
Iently becomes too low due to too many speaker
connections, the output stage transistor breaks down
because of excesive power consumption by the
transistors or of excess current. The circuit shown in
Fig. 13 composed of TRIS and 17 and TR16 and 18
prevents this damage. TRIS and I7 circuit operates
for excessive 1» signal current and TR16 and 18
operate {or excessive - signal.

The case when there is a current overflow of 4 signal
will be explained here. Ordinarily, TRIS base
potential and the emitter potential are almost equal
and TRIS is OFF. When the load RI. becomes lower
» than the power amplifier's specified load or is shon-
-cirt:uited, excess current flows to the output stage
transistor. This causes the base potential of TRIS to
become greater than the emitter potential and TRIS
turns 0N.
When this happens, the signal to TR19 passes D8 and
R40 and is dropped to the center (node) point.
The output stage transistor, therefore, stops receiving
the signal and the excess current does not flow,
Also when TRIS is turned ON, TR17 base potential
is decreased to turn on TRI 7. TRI 5 base potential is
thereby further increased to make the operation
fullproof. Also when TRIS is turned ON. relay RLI
(see Fig. 14) turns OFF and the power amplifier
output is disconnected from the speaker,
TR16 and IE operate in the same way for excess
signal current to protect the output stage transistor.


Fig 13

5) Power Limiter Circuit (Refer to Fig. 13)

This circuit is to protect the output stage transistor
at excessive input. When the input signal voltage to
TRI9 and TRZO exceeds a certain point, it is limited
and prevents excessive input to the output stage
transistor. Only the use of positive signal input will
be explained here

There is very little voltage amplification because
TRI9, TRZI, and the output stage transistor are
emitter followers at current amplification. In other
words, the TR19 base is supplied with the same
voltage as speaker output voltage, So the maximum
voltage to appear at the output is +VCC, Signals with
voltage of no less than approximately 2.1V or 3 diode
voltage drops less than this +Vcc are limited by TRIS,
D4. and D6.

To explain the circuit operation, rim, Wat is added
to the TRI3 collectori The voltage between TRIS
collector and emitter has a potential of 5 diode
voltage drops or approximately 3.5V according to the
design, and a voltage 3.5V lower than C901 positive
voltage appears at the emitter.

Next, taking a look at the signal voltage, we find that
when the value after subtracting the voltage drops
of D4 and D6 (approximately 0.7V x 2) is greater
than TRIS emitter potential. the signal pages R38
and is grounded to be limited. By the above
operation, when there is a voltage no less than the
value approximately ztlv (Voltage drops of D4 and
D6 subtracted from TR13 ch) less than *Vcc» the
signal pm: D4~D6<~R38 and is grounded to limit
the Outpult

Page 12

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Fig. l7

9) Li and R65 Opention (Refer to Fig. 17 to 19)

As shown in Fig. 17, most amplifiers have an
inductance or a resistor between the output and the
speaker. The inclusion has several advantages.
Considering the negative effect when l. and R is
inputted we find that the power amplifier output
impedance increases higher the frequency in the case
of inductance. This negative effect is shown in
Fig. 18. However. as can be seen in the figure, the
effect of the inductance is merely 0.014 ohm at
lkHz and L4 ohm even A! lot) kHz, and is hardly a

Considering the positive side, we find that the
impedance seen from the load terminal becomes
extremely low at high frequencies due to such factors
as speaker cord capacitive components and L-C
networks for speaker frequency divider. However,

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Fig. l8

the load impedance seen from the power amplifier
output can maintain a value above a certain level due
to the effect from L and R added in series to the load

Also the addition of I, and R serves as a buffer when
the power amplifier begins high range oscillation as a
result of poor grounding of the Pin jack or phase
difference caused by capacitance load ar the output
stage, etc. When something with a capacitance
component is connected to the load in this way, a
series resonance circuit rs constructed as in Fig. 19(2)
and the load impedance becomes 0 at the resonance
point. Bur because of the operation of R connected
parallel to L. the resonance circuit is damped and
looks as if a pure resistor has been added equivalently
as in Fig.19(b), and the load impedance does not
become zero even at the resonance point.



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Fig. 20 Level Diagram PS-ZOOM



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Fig. 21 Level Diagram PS-lZDM and PSQODM